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Uranium based or Plutonium based ... ???@HRK @Signalian
Bro, Indonesia have three research nuclear reactor with one of them have 30 MW capacity. Do you think this research reactor is enough if we some how decide to make a nuclear bom ?
Our nuclear agency (BATAN) is also currently designing new research reactor with 50 MW capacity.
Uranium based or Plutonium based ... ???
but it any case it seems difficult if you only have research reactors ..... many other factors for weaponization of nuclear capability are also required ....
As I am not much aware about Indonesian capabilities in Nuclear field therefore could not comment much about the defence related capabilities of Indonesia in Nuclear field ....
In case of Uranium one need highly enriched Uranium above 95% which civilian reactors don't produced ....30 MW reactor is uranium based, we have three reactor and the first one is built in 1960's so I believe Indonesian Nuclear Agency (Batan) have already quite expert on nuclear technology. Batan has been quite long exporting nuclear products. The agency has been able to make the nuclear fuel as well, we dont rely on import for nuclear fuel nowadays as US company who used to provide it stop exporting and we make it by ourselves. I think knowledge about making hydrogen bomb could have been taken as well since the reactor can produce hydrogen after I read on their website and they talk about hydrogen making.
In case of Uranium one need highly enriched Uranium above 95% which civilian reactors don't produced ....
Nuclear reactors do not enrich Uranium but consume low enrich Uranium as reactor fuel; roughly speaking matter only related to Uranium enrichment only 3-5% is required for civilian program 90-95% or above enrichment for weapon grade, achievement of this high percentage of enrichment is dependent on method and its design efficiency .....Civilian reactors of course dont produce 95 % enrich uranium since they are made to generate electricity, but we are talking about research reactor where the agency have freedom to do many kind of research. I mean if the reactor can enrich uranium until 5-6 %, so does it have capability to enrich uranium until 95 % ?
In my plain assumption, enriching the uranium into 95 % is more about time, so the longer the process of enriching, the uranium will reach that 95 % level. Or in other meaning, once a nuclear agency has capability to enrich uranium then it will no be difficult to do the enrichment until 95 %
First question: platform you are using?@fitpOsitive @ps3linux @Fawadqasim1 @Hamartia Antidote, do you have various ideas on how to implement critical sections for collaborating processes in a multi-core setup ? This will be at kernel level, hardware level and overall system level. I have spent a sleepless night on this.
Following are the elements that I have thought to be part of this :
1. Globally-seen textual names of critical sections which can be called by programs to get attached to the names. The return of the attach system call will be a serial number.
2. Allowing only eight critical section serial numbers to a program so each program ( and its task ) can work with only eight crit secs.
3. Kernel connects those serial numbers to some kernel memory locations.
4. Use crit sec spinlock take and release instructions which switch the state of a hardware crit sec spinlock line from 0 to 1 and vice versa and which allow a short sampling of the aforementioned kernel memory locations.
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I see an issue here : Suppose there are three cores, and all cores being clockless ( if that matters here ), how to ensure that only one core is allowed to grab the line ? Is there a simple solution to this ?
First question: platform you are using?
Second question : software you are using?
Third question : application or purpose?
I am an IC design guy, so basically processor and software related things are bit not of my experience scope. But I anyway have some idea about these things. So let's see whether I can help or not.
OkATM the ideas are on paper, in text documents on my PC and also described on an open source hardware projects website.
For many years now I have been designing a new SoC microprocessor. It is RISC-based with some newer instructions ( compared to others ) and the instruction execution is supposed to be clock-less. I think I have simplified some things in processor-related things.
OK.