Srinivas
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Yes but these days ASICs are not that popular because of Qual comm general purpose processors which are offering better functionality and performance at cheaper rate.
It takes 40 to 50 people team to build an ASIC in 1 to 2 years from the scratch.
From the RTL designer point of view ASIC or FPGA design won't make much difference except that in ASIC they use specific libraries and in FPGA they use LUT(XILINX) and muxes for Altera.
Asic also need Verilog /VHDL code to start with, the design is synthesised to gate level that is EDIF format.
The EDIF format can be used for both FPGA and ASIC.
The EDIF format is transformed into transistor level and is mapped into the corresponding libraries for ASIC.
The same EDIF format can be used to program the FPGA and make it a similar module.
These days even Pentium Processors are designed using FPGAs before transforming the VHDL/Verilog code into ASIC compatible format.
The physical design involves Transistor and Gate design, Each library has some set of gates and the Physical designer designs them to make a Library. FPGA/ASIC designer deal with system design like micro processor/controller or a router etc..etc...
Regarding SDK or HDK the kit is FPGA specific. Both Xilinx and Altera are user friendly and are leading FPGA vendors.
. MSFT Research does some work around ME (specifically around computing architecture). For our devices we have SC engineers too that work in tandem with Nvidia (our vendor) that supply us the chips. Then we also have engineers that work with TMSC where actual fabrication takes place. That's why I said a decent stack. We don't have a full blown in house design and fabrication work and likely we'll never have.
